ALU Design

Explore the Arithmetic Logic Unit, the computational heart of every processor. Watch how 8-bit inputs flow through the ALU datapath, operations are selected, and results with status flags are produced step by step.

Digital Logic Foundations

Presets

Operation:

Input A15 (0x0F)

Input B 10 (0x0A)

Result

00011001

= 25(0x19)

ZZero

CCarry

VOverflow

NNegative

Internal Computation: Add

Ripple Carry Adder

Carry:

00011100

00001111

00001010

Result:

00011001

Bit-by-Bit Detail

Bit 0: 1 + 0 + carry(0) = 1, carry-out = 0

Bit 1: 1 + 1 + carry(0) = 0, carry-out = 1

Bit 2: 1 + 0 + carry(1) = 0, carry-out = 1

Bit 3: 1 + 1 + carry(1) = 1, carry-out = 1

Bit 4: 0 + 0 + carry(1) = 1, carry-out = 0

Bit 5: 0 + 0 + carry(0) = 0, carry-out = 0

Bit 6: 0 + 0 + carry(0) = 0, carry-out = 0

Bit 7: 0 + 0 + carry(0) = 0, carry-out = 0

1.0x

Ready

Operations0

Current OpAdd (000)

Result (Dec)25

Result (Bin)00011001

Active FlagsNone

ALU Operations Reference

Op	Opcode	Symbol	Function	Category
Add	000	+	A + B	arithmetic
Subtract	001	-	A - B	arithmetic
AND	010	&	A AND B	logic
OR	011	\|	A OR B	logic
XOR	100	^	A XOR B	logic
NOT	101	~	NOT A	logic
Shift Left	110	<<	A << B	shift
Shift Right	111	>>	A >> B	shift

Status Flags Explained

Z (Zero)

Set when the result is exactly 0. Used for equality comparisons (if A - B = 0, then A == B).

5 - 5 = 0 → Z=1

C (Carry)

Set when an unsigned operation produces a result larger than 8 bits (carry out) or a borrow in subtraction.

200 + 100 = 300 → C=1 (300 > 255)

V (Overflow)

Set when a signed operation produces a result outside the -128 to 127 range. Detected when the sign of the result contradicts the signs of the operands.

127 + 1 = -128 → V=1

N (Negative)

Set when the most significant bit (bit 7) of the result is 1, indicating a negative number in two's complement.

5 - 10 = -5 → N=1

ALU Pipeline Stages

1. Load A

2. Load B

3. Select Op

4. Compute

5. Output

Press Play or Step to begin the ALU cycle.