2.4CPU Architecture
Branch Prediction Simulator
Explore how CPUs predict branch outcomes to keep pipelines full. Compare static, 1-bit, 2-bit saturating, and tournament predictors with real-time accuracy tracking and state machine visualization.
Predictor Type
1.0x
Presets:
Branch Sequence
Choose a scenario preset to load a branch pattern.
Branch History Table
IdxStatePredHits
[0]Weakly NTNT0
[1]Weakly NTNT0
[2]Weakly NTNT0
[3]Weakly NTNT0
[4]Weakly NTNT0
[5]Weakly NTNT0
[6]Weakly NTNT0
[7]Weakly NTNT0
1-Bit: Predicts based on last outcome. Mispredicts twice per loop exit.
2-Bit Saturating: Needs two consecutive wrong outcomes to change prediction. Better for loops.
Tournament: Runs local and global predictors in parallel; a chooser counter selects the more accurate one.
Predictions
0
Correct
0
Incorrect
0
Accuracy
0.0%
Penalty Cycles
0
Misp. Penalty
3 cyc
Predictor State Machine
Running Accuracy
Press Play or Step to begin
Prediction History
No predictions yet. Start the simulation.