3.3
Memory Management & Paging
Explore virtual memory paging and page replacement algorithms. Watch how FIFO, LRU, and Optimal handle page faults with configurable frame counts.
1.0x
Presets:
Virtual Addr
0x1A3C
Page Number
--
Frame Number
--
Physical Addr
--
Paging BasicsVirtual to physical address translation via page table
Address Translation Pipeline
Virtual Address
Page + Offset
Page Table Lookup
Frame Resolution
Physical Address
Virtual Address
0x1A3C
Page Number
--
Offset
--
Physical Address
--
Step forward to generate a virtual address and begin translation.
Page Table
| Page # | Frame # | Valid | Dirty | Referenced |
|---|---|---|---|---|
| 0 | 1 | 0 | 0 | |
| 1 | 2 | 0 | 0 | |
| 2 | 0 | 1 | 0 | |
| 3 | 2 | 1 | 0 | |
| 4 | -- | 0 | 0 | |
| 5 | -- | 0 | 0 | |
| 6 | -- | 0 | 0 | |
| 7 | -- | 0 | 0 |
Physical Memory Frames
Frame 0
Page 2
Frame 1
Page 0
Frame 2
Page 1
Frame 3
empty
Address History
No translations yet
Page Table: Maps virtual page numbers to physical frame numbers.
Valid Bit: Indicates if the page is currently in physical memory.
Dirty Bit: Set when the page has been modified in memory.
Translation: Virtual address = page_number * page_size + offset.